Mechanical and Preliminary Electrical Design of a Novel Compliant One-Turn Helix (OTH) Interconnect

Advances in Electronic Packaging

Volumn 3, Issue , 2001, Pages 1891-1896

  Zhu, Qi ^a   Ma, Lunyu ^a   Sitaraman, Suresh K ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DEFORMATION; ELECTRIC POWER SYSTEM INTERCONNECTION; FINITE ELEMENT METHOD; INDUCTANCE; INTEGRATED CIRCUITS; KINEMATICS; MATHEMATICAL MODELS; PRODUCT DESIGN; STRAIN; STRESS ANALYSIS; SUBSTRATES; THERMAL CYCLING; THERMAL LOAD; THERMOMECHANICAL TREATMENT; THICKNESS MEASUREMENT;

DISPLACEMENT; FLIP CHIP INTERCONNECTS;

CHIP SCALE PACKAGES;

EID: 0347569194     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Chang, C.S., Oscilouski, A., and Bracken, R.C., 1998, "Future Challenges in Electronics packaging", Circuits & Devices, pp45-pp54
2. Fjelstad, J., 1998, "Wafer Level Packaging of Compliant CSPs Using Flexible Film Interposers", Proceedings HDI Conference
3. www.formfactor.com
4. Brown, W.D., 1999, Advanced Electronic Packaging, IEEE Press, New York
5. Grover, F.W., 1980, Inductance Calculations Working Formulas and Tables. New York
6. Engelmaier, W., 1987, " Results of IPC Copper Foil Ductility Round-Robin Study", IPC Publication No. 947