A high-speed subpixel edge detector implementation inside a FPGA

Real-Time Imaging

Volumn 9, Issue 5, 2003, Pages 361-368

  Hussmann, Stephan ^a   Ho, Thian H ^a  

^a UNIVERSITY OF AUCKLAND   (New Zealand)

Author keywords

[No Author keywords available]

Indexed keywords

CAMERAS; CHARGE COUPLED DEVICES; COMPUTATIONAL COMPLEXITY; FIELD PROGRAMMABLE GATE ARRAYS; IMAGE QUALITY; IMAGE SENSORS; REAL TIME SYSTEMS;

CCD LINEAR SENSOR; INTELLIGENT LINE CAMERA; SUBPIXEL EDGE DETECTOR;

EDGE DETECTION;

EID: 0346780322     PISSN: 10772014     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.rti.2003.09.013     Document Type: Article

References (14)

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