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Volumn 11, Issue 5, 2002, Pages 445-457

A class of irredundant encoding techniques for reducing bus power

Author keywords

Bus encoding; Low power design; Low power memory systems; Microarchitecture techniques; System level power optimization

Indexed keywords


EID: 0346043261     PISSN: 02181266     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0218126602000562     Document Type: Article
Times cited : (8)

References (13)
  • 3
    • 0030644909 scopus 로고    scopus 로고
    • Asymptotic zero-transition activity encoding for address buses in low-power microprocessor-based systems
    • March
    • L. Benini, G. De Micheli, E. Macii, D. Sciuto, and C. Silvano, "Asymptotic zero-transition activity encoding for address buses in low-power microprocessor-based systems", Proc. 7th Great Lakes Symp. VLSI, March 1997, pp. 77-82.
    • (1997) Proc. 7th Great Lakes Symp. VLSI , pp. 77-82
    • Benini, L.1    De Micheli, G.2    Macii, E.3    Sciuto, D.4    Silvano, C.5
  • 9
    • 0033341913 scopus 로고    scopus 로고
    • Low power chip interface based on bus data encoding with adaptive code-book method
    • March
    • S. Komatsu, M. Ikeda, and K. Asada, "Low power chip interface based on bus data encoding with adaptive code-book method", Proc. 9th Great Lakes Symp. VLSI, March 1999, pp. 368-371.
    • (1999) Proc. 9th Great Lakes Symp. VLSI , pp. 368-371
    • Komatsu, S.1    Ikeda, M.2    Asada, K.3
  • 12
    • 0347284448 scopus 로고    scopus 로고
    • http://www.simplescalar.org/.
  • 13
    • 0029705033 scopus 로고    scopus 로고
    • POSE: Power optimization and synthesis environment
    • June
    • S. Iman and M. Pedram, "POSE: Power optimization and synthesis environment", Proc. 33rd Design Automation Conf., June 1996, pp. 21-26.
    • (1996) Proc. 33rd Design Automation Conf. , pp. 21-26
    • Iman, S.1    Pedram, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.