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2
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38149147000
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DOP - A simple processor for custom computing machines
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J. Danecek, F. Drapal, A. Pluhacek, Z. Salcic, M. Servit, DOP - a simple processor for custom computing machines, J. Microcomp. Applic. 17 (1994) 239-253.
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(1994)
J. Microcomp. Applic.
, vol.17
, pp. 239-253
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Danecek, J.1
Drapal, F.2
Pluhacek, A.3
Salcic, Z.4
Servit, M.5
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4
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21444444958
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CCSimP - An instruction-level custom-configurable processor for FPLDs
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Darinstadt, Germany, September
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Z. Salcic, B. Maunder, CCSimP - an instruction-level custom-configurable processor for FPLDs, in: Conference on Field-Programmable Logic FPL '96, Darinstadt, Germany, September 1996; also published in Lecture Notes in Computer Science 1142, Springer, Berlin, 1996, pp. 280-289.
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(1996)
Conference on Field-Programmable Logic FPL '96
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Salcic, Z.1
Maunder, B.2
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5
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21444444958
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also published Springer, Berlin
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Z. Salcic, B. Maunder, CCSimP - an instruction-level custom-configurable processor for FPLDs, in: Conference on Field-Programmable Logic FPL '96, Darinstadt, Germany, September 1996; also published in Lecture Notes in Computer Science 1142, Springer, Berlin, 1996, pp. 280-289.
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(1996)
Lecture Notes in Computer Science
, vol.1142
, pp. 280-289
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7
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0026189640
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Transputer implementation of Kalman filters
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L.P. Maguire, G.W. Irwin, Transputer implementation of Kalman filters, IEE Proc.-D 138 (1991) 355-362.
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(1991)
IEE Proc.-D
, vol.138
, pp. 355-362
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Maguire, L.P.1
Irwin, G.W.2
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8
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0028699517
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Parallel implementation of IMM tracking algorithm using transputers
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D.P. Atherton, H.J. Lin, Parallel implementation of IMM tracking algorithm using transputers, IEE Proc.-Radar, Sonar Navig. 141 (1994) 325-332.
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(1994)
IEE Proc.-Radar, Sonar Navig.
, vol.141
, pp. 325-332
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Atherton, D.P.1
Lin, H.J.2
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9
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0026941968
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Comparison of adaptive target-tracking algorithms for phased-array radar
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M. Munu, L. Harrison, D. Wilkin, M.S. Woolfson, Comparison of adaptive target-tracking algorithms for phased-array radar, IEE Proc. F. Commun., Radar and Signal 139 (1992) 336-342.
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(1992)
IEE Proc. F. Commun., Radar and Signal
, vol.139
, pp. 336-342
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Munu, M.1
Harrison, L.2
Wilkin, D.3
Woolfson, M.S.4
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11
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0025590420
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Mapping extended Kalman filters onto linear arrays
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R.S. Baheti, D.R. O'Hallaron, H.R. Itzkowitz, Mapping extended Kalman filters onto linear arrays, IEEE Trans., Automatic Control 35 (1990) 1310-1319.
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(1990)
IEEE Trans., Automatic Control
, vol.35
, pp. 1310-1319
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Baheti, R.S.1
O'Hallaron, D.R.2
Itzkowitz, H.R.3
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12
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0031364464
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A fully-hardware-type maximum-parallel architecture for Kalman tracking filter in FPGAs
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Singapore, September MEE Press, ISBN 0-7803-3677-1
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C.R. Lee, Z. Salcic, A fully-hardware-type maximum-parallel architecture for Kalman tracking filter in FPGAs, in: Proceedings of the First International Conference on Information, Communications and Signal Processing ICICS'97, Singapore, September 1997, MEE Press, ISBN 0-7803-3677-1, pp. 1243-1247.
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(1997)
Proceedings of the First International Conference on Information, Communications and Signal Processing ICICS'97
, pp. 1243-1247
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Lee, C.R.1
Salcic, Z.2
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13
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0031360228
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High-performance FPGA-based implementation of Kalman filter
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C.R. Lee, Z. Salcic, High-performance FPGA-based implementation of Kalman filter, J. Microprocessors Microsyst. 21 (1997) 257-265.
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(1997)
J. Microprocessors Microsyst.
, vol.21
, pp. 257-265
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Lee, C.R.1
Salcic, Z.2
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14
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0004506568
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XFASP - A customisable and reconfigurable Kalman filter application-specific processor
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Springer, Berlin
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Z. Salcic, C.R. Lee, XFASP - a customisable and reconfigurable Kalman filter application-specific processor, in: Proceedings of the PART'97, Springer, Berlin, pp. 334-345.
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Proceedings of the PART'97
, pp. 334-345
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Salcic, Z.1
Lee, C.R.2
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15
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0031343311
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Application design for configurable computing
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W.H. Mangione-Smith, Application design for configurable computing, IEEE Computer, 30(10) 1997, 38-43.
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(1997)
IEEE Computer
, vol.30
, Issue.10
, pp. 38-43
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Mangione-Smith, W.H.1
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16
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0346924837
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High-speed image enhancement using FPGA customized hardware
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Dunedin, Springer, Berlin
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Z. Salcic, J. Sivaswamy, High-speed image enhancement using FPGA customized hardware, in: Proceedings of the 5th ANZ International Conference on Intelligent Information Processing Systems, ICO-NIP'97 Dunedin, 1997, Springer, Berlin, pp. 1157-1160.
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(1997)
Proceedings of the 5th ANZ International Conference on Intelligent Information Processing Systems, ICO-NIP'97
, pp. 1157-1160
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Salcic, Z.1
Sivaswamy, J.2
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17
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0031339997
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IMECO: A reconfigurable FPGA-based image enhancement co-processor framework
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Brisbane, December
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Z. Salcic, J. Sivasvamy, IMECO: A reconfigurable FPGA-based image enhancement co-processor framework, in: Proceedings of the IEEE Region 10 Conference TENCON '97, Brisbane, December 1997, pp. 231-234.
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(1997)
Proceedings of the IEEE Region 10 Conference TENCON '97
, pp. 231-234
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Salcic, Z.1
Sivasvamy, J.2
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18
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84956857510
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FPLD HDL, Synthesis employing high-level evolutionary algorithm optimisation
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Proceedings Field-Programmable Logic '97, London, September 1997, Springer, Berlin
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B. Maunder, Z. Salcic, G. Coghill, FPLD HDL, Synthesis employing high-level evolutionary algorithm optimisation, in: Proceedings Field-Programmable Logic '97, London, September 1997, Lecture Notes in Computer Science 1304, Springer, Berlin, 1997, pp. 265-273.
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(1997)
Lecture Notes in Computer Science
, vol.1304
, pp. 265-273
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Maunder, B.1
Salcic, Z.2
Coghill, G.3
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19
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0347555944
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A flexible instruction execution unit - FLIX
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Department of Electrical and Electronic Engineering, Aukland University, 51 pp. Accepted to be published by Kluwer Academic Publishers as a chapter of a book in
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Z. Salcic, A flexible instruction execution unit - FLIX, Technical report, Department of Electrical and Electronic Engineering, Aukland University, 1997, 51 pp. (Accepted to be published by Kluwer Academic Publishers as a chapter of a book in 1998).
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(1997)
Technical Report
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Salcic, Z.1
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