Applying caching to two-level adaptive branch prediction

Proceedings - Euromicro Symposium on Digital Systems Design: Architectures, Methods and Tools, DSD 2001

Volumn , Issue , 2001, Pages 186-193

  Egan, C ^a   Steven, G B ^a   Shim, Won ^b   Vintan, L ^c  

^a UNIVERSITY OF HERTFORDSHIRE   (United Kingdom)

^b Seoul National University of Science and Technology   (South Korea)

^c LUCIAN BLAGA UNIVERSITY OF SIBIU   (Romania)

Author keywords

Cached Correlated Branch Predictors; Prediction Cache; Two level Adaptive Branch Predictors

Indexed keywords

SYSTEMS ANALYSIS;

ADAPTIVE PREDICTORS; BRANCH PREDICTION; BRANCH PREDICTORS; GLOBAL BRANCH HISTORY; HISTORY INFORMATIONS; LOCAL HISTORY; PATTERN HISTORY TABLES; PREDICTION RATE;

FORECASTING;

EID: 0344046194     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2001.952280     Document Type: Conference Paper

References (13)

1. J. L. Hennessy and D. A. Patterson. Computer Architecture: A Quantitative Approach, (Morgan Kaufmann, 1996).
2. T. Yeh. and Y. N. Patt. Alternative Implementations of Two-Level Adaptive Branch Prediction, ISCA-19, Gold Coast, Australia, pp. 124-134, 1992.
3. S. Pan, K. So and J. T. Rahmeh. Improving the Accuracy of Dynamic Branch Prediction Using Branch Correlation, ASPLOS-V, Boston, pp. 76-84, 1992.
4. Y. N. Patt, S. J. Patel, M. Evers, D. H. Friendly and J. Stark. One Billion Transistors, One Uniprocessor, One Chip, Computer, pp. 51-57, 1987.
5. S. McFarling. Combining Branch Predictors, Western Research Laboratories Technical Report TN-36, June 1993.
6. P. Chang, E. Hao, T. Yeh and Y. N. Patt. Branch Classification: A New Mechanism for Improving Branch Predictor Performance, Micro-27, San Jose, California, pp. 22-31, November 1994.
7. C. C. Lee, I. C. K. Chen and T. N. Mudge. The Bi-Mode Branch Predictor, Micro-30, Research Triangle Park, North Carolina, pp. 4-13, December 1997.
8. T. Yeh and Y. N. Patt. Two-Level Adaptive Training Branch Prediction, Micro-24, Albuquerque, New Mexico, pp. 51-61, November 1991.
9. T. Yeh and Y. N. Patt. A Comparison of Dynamic Branch Predictors that use Two Levels of Branch History. ISCA - 20, pp. 257-266, May 1993.
10. C. Egan. Dynamic Branch Prediction in High Performance Superscalar Processors, PhD thesis, University of Hertfordshire, August 2000.
11. th IASTED International Conference on Applied Informatics (AI 2000), Innsbruck, February 2000.
12. K. Skadron, M. Martonosi and D. W. Clark A Taxonomy of Branch Mispredictions, and Alloyed Prediction as a Robust Solution to Wrong-History Mispredictions, PACT-2000, Philadelphia, October 200.
13. G. B. Steven, D. B. Christianson, R. Collins, R. D. Potter and F. L. Steven A Superscalar Architecture to Exploit Instruction Level Parallelism, Microprocessors and Microsystems, 20(7), pp. 391-400, 1997.