Modeling and analysis of fault tolerant multistage interconnection networks

IEEE Transactions on Instrumentation and Measurement

Volumn 52, Issue 5, 2003, Pages 1509-1519

  Choi, Minsu ^a   Park, Nohpill ^b   Lombardi, Fabrizio ^c  

^a Architectural and Environmental Engineering   (United States)

^b Department of Computer Science   (United States)

^c Northeastern University   (United States)

Author keywords

Concurrent fault detection; Diagnosis; Instrumentation; Multistage interconnection network (MIN); Performance analysis; Sensor networks

Indexed keywords

COMPUTER SIMULATION; FAILURE ANALYSIS; FAULT TOLERANT COMPUTER SYSTEMS; INTERCONNECTION NETWORKS; PACKET SWITCHING; PERFORMANCE; SENSORS;

CONCURRENT FAULT DETECTION; FAULT TOLERANT MULTISTAGE INTERCONNECTION NETWORKS; INSTRUMENTATION; SENSOR NETWORKS;

SENSOR DATA FUSION;

EID: 0242636482     PISSN: 00189456     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIM.2003.817906     Document Type: Article

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