Ultra-thin silicon-on-sapphire component technology for short reach parallel optical interconnects

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2003, Pages 335-338

  Kuznia, Charlie ^a   Ahadian, Joe ^a   Englekirk, Mark ^a   Wong, Man ^a   Richaud, Jean ^a   Pendleton, Mike ^a   Pommer, Dick ^a   Reedy, Ron ^a  

^a Peregrine Semiconductor   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

OPTO-ELECTRONIC MODULE; PARALLEL OPTICAL INTERCONNECT; SELF-ALIGNED OPTICAL ELEMENT; ULTRA THIN SILICON;

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED OPTOELECTRONICS; OPTICAL INTERCONNECTS; PRINTED CIRCUIT BOARDS; SEMICONDUCTING SILICON; SEMICONDUCTOR LASERS; SUBSTRATES;

CHIP SCALE PACKAGES;

EID: 0242611972     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. For basics of UTSi CMOS, see www.peregrimesemi.com, and U.S. Patent No. 5,416, 043.
2. John Poultney, "Optical backplane is still coming," EETimes, January 3, 2002.
3. Stevens, R.C., Sauter, G.F., and Selfridge, R.A., "Optical communication for advanced avionics systems," Digital Avionics Systems Conference, 1997. 16th DASC., AIAA/IEEE, Volume: 1, 1997.
4. David A. B. Miller, "Physical Reasons for Optical Interconnection," Int. J. Optoelectronics, 11 1997.
5. Fujikura Technical Review, No 29, pp. 18-22, January 2000.
6. Ashok V. Krishnamoorthy and Keith W. Goosen, "Optoelectronic-VLSI: Photonics Integrated with VLSI Circuits," IEEE JSTQE, 4(6) 1998.
7. J. Lau, Flip-Chip and Wire Bond for CSP, Chip Scale Package: Design, Materials, Processes, and Applications, McGraw-Hill, New York, 1999.
8. www.infinbandta.org
9. www.oiforum.com
10. www.10gea.org