A Cost-Effective Implementation of Multilevel Tiling

IEEE Transactions on Parallel and Distributed Systems

Volumn 14, Issue 10, 2003, Pages 1006-1020

  Jiménez, Marta ^a   Llabería, José M ^a   Fernández, Agustín ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

Compilers; Loop transformations; Memory hierarchy; Multilevel tiling

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); COMPUTATIONAL COMPLEXITY; COST EFFECTIVENESS; DIGITAL STORAGE; MATHEMATICAL TRANSFORMATIONS; MATRIX ALGEBRA; PARALLEL PROCESSING SYSTEMS;

LOOP TRANSFORMATIONS; MULTILEVEL TILING;

PROGRAM COMPILERS;

EID: 0242578180     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPDS.2003.1239869     Document Type: Article

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