A 16-bit, 20MSPS CMOS pipeline ADC with direct INL detection algorithm

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2003, Pages 417-420

  Hisano, Shinichi ^a   Sapp, Scott E ^a  

^a FAIRCHILD SEMICONDUCTOR   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CALIBRATION; CAPACITANCE; CAPACITORS; CMOS INTEGRATED CIRCUITS; DECODING; ELECTRIC POTENTIAL; ERROR ANALYSIS; OPERATIONAL AMPLIFIERS; SIGNAL TO NOISE RATIO; THERMOMETERS; TRANSCONDUCTANCE;

DIFFERENTIAL NONLINEARITY; DIGITAL CALIBRATION ALGORITHM;

ANALOG TO DIGITAL CONVERSION;

EID: 0242443696     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. Lee, S., B. Song, "Digital-Domain Calibration of Multistep Analog-to-Digital Converters," IEEE Journal of Solid-State Circuits, vol. 27, pp. 1679-1688, 1992
2. Lee, S., B. Song, "Interstage Gain Proration Technique for Digital-Domain Multi-Step ADC Calibration," IEEE Transactions on Circuits and Systems II, vol. 41, pp. 12-18, 1994
3. Brooks, T. L., et al., "A 16b ΣΔ Pipeline ADC with 2.5MHz Output Data-Rate," ISSCC Digest of Technical Papers, pp. 208-209, 1997