A 1-V 2.5-mW 5.2-GHz frequency divider in a 0.35-μm CMOS process

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue CIRCUITS SYMP., 2002, Pages 190-193

  Wong, Joseph M C ^a   Cheung, Vincent S L ^a   Luong, Howard C ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL INTEGRATED CIRCUITS; ELECTRIC NETWORK TOPOLOGY; ELECTRIC POWER SUPPLIES TO APPARATUS; ESTIMATION; GATES (TRANSISTOR); MATHEMATICAL MODELS; MOSFET DEVICES;

OPERATING FREQUENCIES; POWER CONSUMPTION; SMALL SIGNAL ANALYSIS;

FREQUENCY DIVIDING CIRCUITS;

EID: 0242443374     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. R. Chen, "High-Speed CMOS Frequency Divider", Electronic Letter, vol. 33, no. 22, pp.1864-1865, Oct. 1997.
2. H. R. Rategh, et al., "A CMOS Frequency Synthesizer with an Injection-Locked Frequency Divdier for a 5-GHz Wireless LAN Receiver", IEEE J. Solid-State Circuit, vol.35, pp. 780-787, May 2000.
3. H. Wang, "A 1.8V 3mW 16.8GHz Frequency Divider in 0.25μm CMOS", ISSCC Digest of Tech. Papers, pp. 196-197, Feb 2000.
4. B. Razavi, et al., "Design of High-Speed, Low-Power Frequency Dividers and Phase-Locked Loops in Deep Sub-micron CMOS", IEEE J. Solid-State Circuit, vol. 30, pp. 101-108, Feb. 1995.
5. B. Razavi, et al., "A 13.4GHz CMOS Frequency Divider", ISSCC Digest of Tech. Papers, pp. 7176-177, 1994.
6. T. Fuse, et al., "A 1.1V SOI CMOS Frequency Divider using Body-Inputting SCL Circuit Technology", IEEE International SOI Conference, pp. 106-107, Oct. 2000