A study on coining processes of solder bumps on organic substrates

IEEE Transactions on Electronics Packaging Manufacturing

Volumn 26, Issue 2, 2003, Pages 166-172

  Nah, Jae Woong ^a   Paik, Kyung Wook ^a   Hwang, Tae Kyung ^a   Kim, Won Hoe ^b  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^b Samsung Electro Mechanics   (South Korea)

Author keywords

Co planarity; Coining; Flip chip; PCB; Solder bump; Warpage

Indexed keywords

FLIP CHIP DEVICES; PLASTIC DEFORMATION; PRINTED CIRCUIT BOARDS; SOLDERING; SUBSTRATES; TEMPERATURE;

COINING PROCESSES; ELASTIC DEFORMATION; SOLDER BUMPS;

CHIP SCALE PACKAGES;

EID: 0242323762     PISSN: 1521334X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TEPM.2003.817732     Document Type: Article

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