Building an RF source for low cost testers using an ADPLL controlled by Texas instruments digital signal processor (DSP) TMS320c5402

IEEE International Test Conference (TC)

Volumn , Issue , 2003, Pages 659-664

  Sylla, Iboun Taimiya ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFICATION; COMPUTER SOFTWARE; DIGITAL SIGNAL PROCESSING; MICROWAVE DEVICES; NATURAL FREQUENCIES; PHASE LOCKED LOOPS; SPURIOUS SIGNAL NOISE;

AUTOMATIC TEST EQUIPMENT (ATE);

INTEGRATED CIRCUIT TESTING;

EID: 0142184787     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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2. J. Saxena and al., "Scan Based Transition Fault Testing, Implementation and Low Cost challenges", Proceedings IEEE International Test Conference, 2002 pp.1120-1129.
3. J. Ferrario and al., " Architecting Millisecond Test Solutions for Wireless Phone RFIC's", Proceedings IEEE International Test Conference, 2002 pp.1151-1158.
4. M. Burns, G. Roberts, " Introduction to Mixed-Signal Test and Measurement".
5. I. T. Sylla, M. Slamani and B. Kaminska "A Unity Gain High Speed Buffer to Improve Signal Integrity in High Frequency Test Interface", Journal of Electronic Testing: Theory and Applications (JETTA). Vol.17, no.1, February 2001.
6. K. Kundert "Modeling and Simulation of jitter in PLL Frequency Synthesizers", WWW.designers-guide.com
7. M. Smith "Phase Noise Measurement Using the Phase Lock Technique", Motorola Application Note AN 1639.
8. S Dassonville, F. Beauregard and F. M. Ghannouchi "Balanced Design Delivers C-Band Vector Modulation", Microwave & RF. November 1994, pp. 80-84