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Volumn 2, Issue , 2003, Pages 485-488

Rapid prototyping of JPEG encoder using the ASIP development system: PEAS-III

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; IMAGE CODING; PROGRAM COMPILERS;

EID: 0141788669     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (10)

References (15)
  • 3
    • 0031624136 scopus 로고    scopus 로고
    • MetaCore: An Application Specific DSP Development System
    • Jin-Hyuk Yang, Byoung-Woon Kim, Sang-Jun Nam, Jang-Ho Cho, Sung-Won Seo, Chang-Ho Ryu, et al., "MetaCore: An Application Specific DSP Development System," in 35th DAC, 1998, pp. 800-803.
    • (1998) 35th DAC , pp. 800-803
    • Yang, J.-H.1    Kim, B.-W.2    Nam, S.-J.3    Cho, J.-H.4    Seo, S.-W.5    Ryu, C.-H.6
  • 5
    • 84871610279 scopus 로고    scopus 로고
    • Tensilica, "Xtensa," http://www.tensilica.com.
    • Xtensa
  • 6
    • 0002802394 scopus 로고
    • Beyond tool-specific machine descriptions
    • Kluwer Academic Publishers
    • Andreas Fauth, "Beyond tool-specific machine descriptions," in Code Generation for Embedded Processors. 1995, pp. 138-152, Kluwer Academic Publishers.
    • (1995) Code Generation for Embedded Processors , pp. 138-152
    • Fauth, A.1
  • 7
    • 0032629527 scopus 로고    scopus 로고
    • A methodology for accurate performance evaluation in architecture exploration
    • June
    • George Hadjiyiannis, Pietro Russo, and Srinivas Devadas, "A methodology for accurate performance evaluation in architecture exploration," in 36th Design Automation Conference, June 1999, pp. 927-932.
    • (1999) 36th Design Automation Conference , pp. 927-932
    • Hadjiyiannis, G.1    Russo, P.2    Devadas, S.3
  • 8
    • 0032674031 scopus 로고    scopus 로고
    • LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architecture
    • Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, and Heinrich Meyr, "LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architecture," in 36th Design Automation Conference, 1999, pp. 933-938.
    • (1999) 36th Design Automation Conference , pp. 933-938
    • Pees, S.1    Hoffmann, A.2    Zivojnovic, V.3    Meyr, H.4
  • 10
    • 84893597192 scopus 로고    scopus 로고
    • EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability
    • Mar.
    • Ashok Halambi, Peter Grun, Vijay Ganesh, Asheesh Khare, Nikil Dutt, and Alex Nicolau, "EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability," in DATE 99, Mar. 1999, pp. 485-490.
    • (1999) DATE 99 , pp. 485-490
    • Halambi, A.1    Grun, P.2    Ganesh, V.3    Khare, A.4    Dutt, N.5    Nicolau, A.6
  • 11
    • 0030706479 scopus 로고    scopus 로고
    • Advanced Processor Design Using Hardware Description Language AIDL
    • T. Morimoto, K. Saito, H. Nakamura, T. Boku, and K. Nakazawa, "Advanced Processor Design Using Hardware Description Language AIDL," in ASP-DAC'97, 1997, pp. 387-390.
    • (1997) ASP-DAC'97 , pp. 387-390
    • Morimoto, T.1    Saito, K.2    Nakamura, H.3    Boku, T.4    Nakazawa, K.5
  • 15
    • 0017538003 scopus 로고
    • A fast computational algorithm for the discrete cosine transform
    • W. H. Chen, C. H. Smith, and S. C. Fralick, "A fast computational algorithm for the discrete cosine transform," IEEE Trans. Commun., pp. 1004-1009, 1977.
    • (1977) IEEE Trans. Commun. , pp. 1004-1009
    • Chen, W.H.1    Smith, C.H.2    Fralick, S.C.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.