Concurrent interleaving architectures for high-throughput channel coding

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 2, Issue , 2003, Pages 613-616

  Thul, Michael J ^a   Gilbert, Frank ^a   Wehn, Norbert ^a  

^a Rheinland Pfälzische Technische Universität Kaiserslautern Landau   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

DECODING; ENCODING (SYMBOLS); TOPOLOGY; TURBO CODES;

DATA RATES;

COMMUNICATION CHANNELS (INFORMATION THEORY);

EID: 0141788601     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. A. Giulietti, L. van der Perre, and M. Strum. Parallel turbo decoding interleavers: avoiding collisions in accesses to storage elements. Electronics Letters, 38(5):232-234, Feb. 2002.
2. V. Lakamraju, I. Koren, and C. Krishna. Synthesis of interconnection networks: A novel approach. In in Proc. 20th International Conference on Dependable Systems and Networks, pages 56-64, June 2000.
3. T. Richter and G. Fettweis. Parallel Interleaving on Parallel DSP Architectures. Proc. 2002 Workshop on Signal Processing Systems (SiPS '02), pages 195-200, Oct. 2002.
4. M. J. Thul, F. Gilbert, T. Vogt, G. Kreiselmaier, and N. Wehn. A Scalable System Architecture for High-Throughput Turbo-Decoders. In Proc. 2002 Workshop on Signal Processing Systems (SiPS 2002), San Diego, California, USA, Oct. 2002.
5. M. J. Thul, F. Gilbert, and N. Wehn. Optimized Concurrent Interleaving for High-Speed Turbo-Decoding. In Proc. 9th IEEE International Conference on Electronics, Circuits and Systems - ICECS 2002, Dubrovnik, Croatia, Sept. 2002.
6. M. J. Thul, N. Wehn, and L. P. Rao. Enabling High-Speed Turbo-Decoding Through Concurrent Interleaving. In Proc. 2002 IEEE International Symposium on Circuits and Systems (ISCAS '02), Phoenix, Arizona, USA, May 2002.