Semiconductor IP core for ultra low power MPEG-4 video decode in system-on-silicon

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 2, Issue , 2003, Pages 681-684

  Dunlop, J ^a   Simpson, A ^a   Masud, S ^b   Wylie, M ^a   Cochrane, J ^a   Kinkead, R ^a  

^a Amphion Semiconductor Ltd   (United Kingdom)

^b LAHORE UNIVERSITY OF MANAGEMENT SCIENCES   (Pakistan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FIELD PROGRAMMABLE GATE ARRAYS; IMAGE COMPRESSION; IMAGE QUALITY; SEMICONDUCTOR MATERIALS; SILICON;

VIDEO DECODING;

VIDEO SIGNAL PROCESSING;

EID: 0141788563     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. J. Kneip, B. Schmale, H. Möller, R. Bosch, 'Applying and Implementing the MPEG-4 Multimedia Standard', IEEE Micro, Nov-Dec 1999, pp 64-74
2. M. Berekovic, H.-J. Stolberg, M.B. Kulaczewski, P. Pirsch, 'Instruction Set Extensions for MPEG-4 Video', Journal of VLSI Signal Processing, 1999, Vol. 23, pp 27-49
3. M. Berekovic, H.-J. Stolberg, P. Pirsch, 'A Programmable Co-Processor for MPEG-4 Video', IEEE International Conference on Acoustics Speech and Signal Processing, May 2001, pp 1021-1024
4. ARC Processor Cores, http://www.arc.com, on 29/10/02
5. CS6750 Product Brief, Amphion Semiconductor Ltd., http://www.amphion.com on 29/10/02
6. M. Takahashi, T. Nishikawa et al., 'A 60-MHz 240-mW MPEG-4 Videophone LSI with 16-Mb Embedded DRAM', IEEE Journal of Solid-State Circuits, Vol. 35, No. 11, Nov 2000, pp 1713 - 1721