A mixed-signal VLSI neural network with on-chip learning

Canadian Conference on Electrical and Computer Engineering

Volumn 1, Issue , 2003, Pages 591-594

  Mirhassani, Mitra ^a   Ahmadi, Majid ^a   Miller, William C ^a  

^a UNIVERSITY OF WINDSOR   (Canada)

Author keywords

Mixed signal neural network; On chip learning

Indexed keywords

COMPUTER SIMULATION; LOGIC GATES; NEURAL NETWORKS; SIGNAL PROCESSING;

ON-CHIP LEARNING;

INTEGRATED CIRCUITS;

EID: 0141763830     PISSN: 08407789     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. B.Furman and A.A.Abidi, "An analog CMOS backward error propagation LSI chip," Proc. 22nd ASILOMAR Conf, on Signal, System and computers, 645-648, 1998.
2. M.Holler, S.Tam, H.Castro and R.Benson, "An Electrically Trainable Analog Neural Network ETANN with 10240 floating-gate synapses," Proc. Int. Joint Conference on Neural Networks IJCNN, 191-196, 1989.
3. N.Yazdi, M.Ahmadi and M.Shridhar, "A multi layer neural network architecture with external weight memory," Proceedings of the 36th Midwest Symposium on Circuits and Systems, vol. 2, 1288-1291, 1993.
4. H.Djahanshahi, M.Ahmadi, G.A.Jullian and W.C.Miller, "A unified synapse-neuron building block for hybrid VLSI neural networks," Proc. Int. Symposium on Circuits and Systems (ISCAS), vol. 3, 483-486, 1996.
5. H.Djahanshahi, M.Ahmadi, G.A.Jullian and W.C.Miller, "Quantization noise improvement in a distributed-neuron architecture," Proceeding of 40th Midwest Symposium on Circuits and Systems, vol. 2, 1282-1285, 1997.
6. B.Widrow and M.A.Lehr, "30 years of adaptive neural networks: Perceptron, Madaline, and Backpropagation," Proceedings of IEEE, vol. 76, no. 9, 1415-1440, 1990.
7. D.Andes, B.Widraw and M.Lehr, "MRIII, A robust algorithm for training analog neural networks," Proc. Int. Joint Conference on Neural Networks IJCNN, vol. I, 553-556, 1990.