Record-low 4 mω·mm2 specific on-resistance for 20V trench MOSFETs

IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)

Volumn , Issue , 2003, Pages 32-35

  In 't Zandt, M A A ^a   Hijzen, E A ^a   Hueting, R J E ^a   Koops, G E J ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CHARGE; ELECTRIC RESISTANCE; LITHOGRAPHY; SEMICONDUCTOR DOPING; SWITCHING;

CHARGE DENSITY;

MOSFET DEVICES;

EID: 0042941448     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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2. C. Bulucea and R. Rossen, "Trench DMOS Transistor Technology for High-Current (100 A) Switching", Solid-State Electronics, vol. 34, no. 5, pp. 493-507, 1991.
3. J.W. Slotboom and G. Streutker, "The Mobility Model in MINIMOS", ESSDERC, pp. 87-91, 1989.
4. C.T. Sah, T.H. Ning and L.L. Tschopp, "The scattering of electrons by surface oxide charges and lattice vibrations at the silicon-silicon dioxide interface", Surface Science, vol 32, pp. 561-575, 1972.
5. K. Lee et al., "Physical understanding of low-field carrier mobility in silicon MOSFET inversion layer", IEEE trans. on electr. dev., vol. 38, no 8, pp. 1905-1912, 1991.
6. J. Zeng et al., "An Ultra Dense Trench-Gated Power MOSFET Technology Using A Self-Aligned Process", ISPSD, p. 147-150, 2001.
7. S. Peake et al., "Fully Self-Aligned Power Trench-MOSFET Utilising 1 μm Pitch and 0.2 μm Trench Width", ISPSD, p. 29-32, 2002.
8. K. Sakamoto et al., "Low On-Resistance And Low Feedback-Charge, Lateral Power MOSFETs With Multi-Drain Regions For High-Efficient DC/DC Converters", ISPSD, p. 25-28, 2002