A new scheduling approach using combined dispatching criteria in wafer fabs

IEEE Transactions on Semiconductor Manufacturing

Volumn 16, Issue 3, 2003, Pages 501-510

  Dabbas, Russ M ^a   Fowler, John W ^b  

^a MOTOROLA INC   (United States)

^b Arizona State University   (United States)

Author keywords

Dispatching; Scheduling; Semiconductor manufacturing; Wafer fabrication

Indexed keywords

INTEGRATED CIRCUIT MANUFACTURE; OPTIMIZATION; PERFORMANCE; SCHEDULING; SEMICONDUCTOR DEVICE MANUFACTURE;

COMBINED DISPATCHING CRITERIA; DESIGN OF EXPERIMENTS; WAFER FABRICATION;

SILICON WAFERS;

EID: 0042887637     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSM.2003.815201     Document Type: Article

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