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Volumn , Issue , 2003, Pages 706-709

A 1.5GHz third generation Itanium® 2 processor

Author keywords

Design methodology; On die cache; Processor; Reliability; Test

Indexed keywords

BANDWIDTH; CACHE MEMORY; DIELECTRIC MATERIALS; PARALLEL PROCESSING SYSTEMS; TRANSISTORS;

EID: 0042134652     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/776008.776011     Document Type: Conference Paper
Times cited : (7)

References (4)
  • 1
    • 0034452603 scopus 로고    scopus 로고
    • A 130nm generation logic technology featuring 70nm transistors, dual Vt transistors and 6 layers of Cu interconnects
    • Dec.
    • S. Tyagi, et al, - "A 130nm generation logic technology featuring 70nm transistors, dual Vt transistors and 6 layers of Cu interconnects", IEDM Tech. Digest, Dec. 2000
    • (2000) IEDM Tech. Digest
    • Tyagi, S.1
  • 2
    • 24444464007 scopus 로고    scopus 로고
    • An enhanced 130nm generation logic technology featuring 60nm transistors optimized for high performance and low power
    • Dec.
    • S. Thompson, et al, - "An enhanced 130nm generation logic technology featuring 60nm transistors optimized for high performance and low power", IEDM Tech. Digest, Dec. 2001
    • (2001) IEDM Tech. Digest
    • Thompson, S.1
  • 4
    • 0036111661 scopus 로고    scopus 로고
    • The implementation of the next-generation 64b Itanium® microprocessor
    • Feb.
    • S. Naffziger, G. Hammond - "The implementation of the next-generation 64b Itanium® microprocessor", ISSCC Dig. Tech. Papers, Feb. 2002, pp 344-472
    • (2002) ISSCC Dig. Tech. Papers , pp. 344-472
    • Naffziger, S.1    Hammond, G.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.