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Volumn 130, Issue 2, 2003, Pages 291-328

A satisfiability procedure for quantified Boolean formulae

Author keywords

BDDs; Circuit verification; Cut width; Davis and Putnam procedure; Model checking; QBF; Satisfiability

Indexed keywords

ALGORITHMS; DECISION THEORY;

EID: 0042014051     PISSN: 0166218X     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0166-218X(02)00409-2     Document Type: Conference Paper
Times cited : (42)

References (31)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.