Optimization of fabrication conditions for multilayer structures with La-doped YBCO groundplane

IEEE Transactions on Applied Superconductivity

Volumn 13, Issue 2 I, 2003, Pages 787-790

  Horibe, Masahiro ^a   Wakana, Hironori ^a   Ishimaru, Yoshihiro ^a   Adachi, Seiji ^a   Tarutani, Yoshinobu ^a   Tanabe, Kiichi ^a  

^a SUPERCONDUCTIVITY RESEARCH LABORATORY   (Japan)

Author keywords

Groundplane; Interface engineered junctions; La YBCO; LSAT

Indexed keywords

INTERFACES (MATERIALS); QUANTUM ELECTRONICS; SEMICONDUCTING FILMS; SEMICONDUCTOR JUNCTIONS; SPUTTERING;

QUANTUM CIRCUITS;

HIGH TEMPERATURE SUPERCONDUCTORS;

EID: 0041975829     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2003.814043     Document Type: Conference Paper

References (4)

1. c superconductor/normal-metal/superconductor edge junctions and SQUIDs with integrated groundplanes," Appl. Phys. Lett., vol. 68, pp. 3805-3807, June 1996.
2. x Josephson junction process for digital circuit applications," Appl. Phys. Lett., vol. 68, pp. 3808-3810, June 1996.
3. S. Adachi, H. Wakana, M. Horibe, N. Inoue, T. Sugano, and K. Tanabe, "Preparation of La-doped Yb-123 thin films," Physica C, vol. 378-381, pp. 1213-1215, October 2002.
4. M. Horibe, T. Suzuki, H. Tano, H. Wakana, Y. Ishimaru, S. Adachi, O. Horibe, Y. Tarutani, and K. Tanabe, "Improvement of ramp-surface morphology for interface-engineered junction," Physica C, vol. 378-381, pp. 1362-1367, October 2002.