Temporofunctional crosstalk noise analysis

Proceedings - Design Automation Conference

Volumn , Issue , 2003, Pages 860-863

  Chai, Donald ^a   Kondratyev, Alex ^b   Ran, Yajun ^c   Tseng, Kenneth H ^b   Watanabe, Yosinori ^b   Marek Sadowska, Malgorzata ^d  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b CADENCE DESIGN SYSTEMS   (United States)

^c University of California   (United States)

^d UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Crosstalk noise; SAT formula; Timed Boolean logic

Indexed keywords

ALGORITHMS; BOOLEAN ALGEBRA; CROSSTALK; DELAY CIRCUITS; GATES (TRANSISTOR); RELIABILITY THEORY; SPURIOUS SIGNAL NOISE; TIMING CIRCUITS;

AGGRESSORS;

LOGIC DESIGN;

EID: 0041633590     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/775832.776048     Document Type: Conference Paper

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