Characterization of Reactive Ion Etching of Silicon Substrate for Backside Failure Mode Analysis

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Volumn , Issue , 2002, Pages 675-682

  Wu, Huixian ^a   Cargo, James ^a  

^a AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANISOTROPY; ELECTRODES; FAILURE ANALYSIS; INDUCTIVELY COUPLED PLASMA; METALLIZING; OPTIMIZATION; POLISHING; REACTIVE ION ETCHING; SURFACE ROUGHNESS; THERMAL STRESS;

LIGHT DISTORTION; PLASMA DAMAGE;

SILICON COMPOUNDS;

EID: 0038443722     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. 2 mixture", International Symposium on Micro-mechanics and Human Science pp. 61-66, 1997
2. G.S. Oehrlein et al, J. Vac. Sci. Technology (1989)
3. Junji Ohara, et al, "Improvement of Si/SiO2 Mask Etching Selectivity in the New D-RIE Process", 2007 IEEE
4. Richard L. Lane and Zhong Li, "Surface Roughness Studies of Deep Plasma Etching in Crystalline Silicon"
5. Richard Petri, Pascal Brault and et al, "Silicon roughness induced by plasma etching", J. Appl. Phys. 75 (11), pp. 7498-7506,1 June 1994