Design of CMOS CML circuits for high-speed broadband communications

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2003, Pages

  Green, Michael M ^a   Singh, Ullas ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; EMITTER COUPLED LOGIC CIRCUITS; OPTIMIZATION;

BROADBAND COMMUNICATION;

COMMUNICATION SYSTEMS;

EID: 0038422894     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. A. Momtaz et al., "A fully integrated SONET OC48 transceiver in standard CMOS," Solid-State Circuits Conference, 2001. Digest of Technical Papers, pp. 1964-1973, Feb. 2001.
2. A. Tanabe et al., "A 10 Gb/s demultiplexer IC in 0.18μm CMOS using current mode logic with tolerance to the threshold voltage fluctuation," Solid-State Circuits Conference, 2000. Digest of Technical Papers, pp. 60-61, Feb. 2000.
3. M. M. Green et al., "OC-192 transmitter in standard 0.18/μm CMOS," Solid-State Circuits Conference, 2002. Digest of Technical Papers, pp. 248-249, Feb. 2002.
4. J. Cao et al., "OC-192 receiver in standard 0.18μm CMOS," Solid-State Circuits Conference, 2002. Digest of Technical Papers, pp. 250-251, Feb. 2002.
5. M. Alioto & G. Palumbo, "CML and ECL: Optimized design and comparison," IEEE Transactions on Circuits and Systems - I, vol. 46, pp. 1330-1341, Nov. 1999.