A 1Gb multilevel AG-AND-type flash memory with 10MB/s programming throughput for mass storage application

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2003, Pages

  Yoshida, Keiichi ^a   Tsuchiya, Osamu ^a   Yamaguchi, Yasunori ^a   Kishimoto, Jiro ^a   Ikeda, Yoshinori ^a   Narumi, Shunichi ^a   Takase, Yoshinori ^a   Furusawa, Kazunori ^b   Izawa, Kazuto ^b   Yoshitake, Takayuki ^b   Kobayashi, Takashi ^b   Kurata, Hideak ^b   Kanemitsu, Michitaro ^a  

^a HITACHI LTD   (Japan)

^b Hitachi ULSI Systems ^*

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CMOS INTEGRATED CIRCUITS; COMPUTER PROGRAMMING; DATA TRANSFER; ELECTRIC CURRENT CONTROL; ELECTRIC FIELDS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT LAYOUT; STATIC RANDOM ACCESS STORAGE; STORAGE ALLOCATION (COMPUTER); TRANSISTORS; VIDEO CAMERAS;

ASSISTED GATE AND TYPE CELL; CONSTANT CHARGE INJECTION PROGRAMMING; FAST PAGE PROGRAMMING; MASS STORAGE; MULTI BANK OPERATION; SENSE LATCH CIRCUIT;

FLASH MEMORY;

EID: 0038306347     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. M. Bauer et al., "Multilevel Cell 32Mb Flash Memory," ISSCC Digest of Technical Papers, pp. 132-133, 1995
2. A. Nozoe et al., "A 256Mb Multilevel Flash Memory with 2MB/s Program Rate for Mass Storage Application," ISSCC Digest of Technical Papers, pp. 110-111, 1999.
3. 2 AND-type 512Mb Flash Memory with 1.8V power Supply," ISSCC Digest of Technical Papers, pp. 30-31, 2001.
4. T. Kobayashi et al., "A Giga-Scale Assist-Gate (AG)-And Type Flash Memory Cell with 20-MB/s Programming Throughput for Content-Downloading Applications," IEDM Digest. Tech. Papers, pp. 29-32, 2001
5. H. Kurata et al., "Constant-Charge-Injection for 10MB/s Multilevel AG-AND Flash Memorie," Symp. VLSI Circuits, pp. 302-303, 2002.