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Volumn , Issue , 2003, Pages 21-26

Design issues in low-voltage high-speed current-mode logic buffers

Author keywords

Current mode logic; High speed; Integrated Circuit; Noise; VLSI

Indexed keywords

CAPACITOR STORAGE; CMOS INTEGRATED CIRCUITS; DIGITAL CIRCUITS; ELECTRIC CURRENTS; ELECTRIC INVERTERS; ELECTRIC POTENTIAL; LOGIC DESIGN; POWER ELECTRONICS; SIGNAL PROCESSING; SPURIOUS SIGNAL NOISE; TRANSISTORS;

EID: 0038037543     PISSN: 10661395     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/764808.764815     Document Type: Conference Paper
Times cited : (7)

References (7)
  • 2
    • 0036735606 scopus 로고    scopus 로고
    • Prospects of CMOS technology for high-speed optical communication circuits
    • Sept.
    • B. Razavi, "Prospects of CMOS Technology for High-Speed Optical Communication Circuits," IEEE J. Solid-State Circuits, vol. 37, No. 9, pp. 1135-1145, Sept. 2002.
    • (2002) IEEE J. Solid-State Circuits , vol.37 , Issue.9 , pp. 1135-1145
    • Razavi, B.1
  • 4
    • 0036287878 scopus 로고    scopus 로고
    • Self-timed MOS current mode logic for digital applications
    • May
    • M. H. Anis, M. I. Elmasry, "Self-timed MOS current mode logic for digital applications," IEEE Int'l Symp. on Circuits and Systems, vol. 5, pp. 113-116, May 2002.
    • (2002) IEEE Int'l Symp. on Circuits and Systems , vol.5 , pp. 113-116
    • Anis, M.H.1    Elmasry, M.I.2
  • 7
    • 0023315137 scopus 로고
    • CMOS circuit speed and buffer optimization
    • March
    • N. Hedenstierna, K. O. Jeppson, "CMOS Circuit Speed and Buffer Optimization," IEEE Trans.Computer-Aided Design, vol. CAD-6, No. 2, pp. 270-281, March 1987.
    • (1987) IEEE Trans. Computer-Aided Design , vol.CAD-6 , Issue.2 , pp. 270-281
    • Hedenstierna, N.1    Jeppson, K.O.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.