Image processor capable of block-noise-free JPEG2000 compression with 30frames/s for digital camera applications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2003, Pages

  Yamauchi, Hideki ^a   Okada, Shigeyuki ^a   Taketa, Kazuhiko ^a   Ohyama, Tatsushi ^a   Matsuda, Yuh ^a   Mori, Tsugio ^a   Okada, Shin'ichiro ^a   Watanabe, Tsuyoshi ^a   Matsuo, Yoshihiro ^a   Yamada, Yuji ^a   Ichikawa, Tatsuya ^a   Matsushita, Yoshifumi ^a  

^a SANYO ELECTRIC CO LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ANALOG TO DIGITAL CONVERSION; CHARGE COUPLED DEVICES; CMOS INTEGRATED CIRCUITS; DIGITAL TO ANALOG CONVERSION; DYNAMIC RANDOM ACCESS STORAGE; MOBILE RADIO SYSTEMS; MULTIMEDIA SYSTEMS; PERSONAL DIGITAL ASSISTANTS; STATIC RANDOM ACCESS STORAGE; VIDEO CAMERAS; WAVELET TRANSFORMS;

BLOCK-NOISE-FREE; CHARGE COUPLED DEVICE IMAGE PROCESSOR; DIGITAL CAMERA; DISCRETE WAVELET TRANSFORM; JOINT PHOTOGRAPHIC EXPERTS GROUP; MULTIMEDIA SIGNAL PROCESSOR;

IMAGE COMPRESSION;

EID: 0037969397     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. ISO/IEC IS 15444-1, "Information Technology - JPEG2000 image coding system - Part 1: Core coding system," ISO/IEC JTC1/SC29/WG1 (Dec. 2000), AMENDMENT 1:Codestream restrictions (Mar 2002).
2. H. Yamauchi et al., "One-Chip 15-Frames/s Mega-pixel Real-time Image Processor," ISSCC Digest of Technical Papers, pp. 144-145, 2001.