A multi standard single-chip transceiver covering 5.15 to 5.85GHz

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2003, Pages 349-351+498

  Schwanenberger, Thomas ^a   Ipek, Mehmet ^a   Roth, Sabine ^a   Schemmann, Heinrich ^a  

^a Thomson ^*  (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ACOUSTIC SURFACE WAVE FILTERS; AMPLIFIERS (ELECTRONIC); AMPLITUDE MODULATION; CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; LOCAL AREA NETWORKS; MOBILE RADIO SYSTEMS; PHASE LOCKED LOOPS; PHASE SHIFT KEYING; SEMICONDUCTING SILICON COMPOUNDS; SPURIOUS SIGNAL NOISE; STANDARDS;

DUAL LOOP PROGRAMMABLE SYNTHESIZER; MULTI STANDARD SINGLE CHIP TRANSCEIVER; POWER GAIN; WIRELESS LOCAL AREA NETWORK RADIO SYSTEM;

TRANSCEIVERS;

EID: 0037968958     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. D. Su, et al, "A 5GHz CMOS Transceiver for IEEE 802.11a Wireless LAN," ISSCC Digest of Technical Papers, pp. 92-93, February 2002.
2. IEEE Standard 802.11a-1999: Wireless LAN MAC and PHY specifications, "High-Speed Physical Layer in the 5GHz Band," IEEE, New York, 2000.
3. T. H. Lee, H. Samavati, H. R. Rategh, "5GHz CMOS Wireless LANs," IEEE Transactions on Microwave Theory and Techniques, vol. 50, no.1, pp. 268-279, January 2002.
4. Patents pending
5. "HiperLan 5.4 GHz Low Power CMOS Synchronous Oscillator," IEEE Transactions on Microwave Theory and Techniques, vol.49, no.9, pp. 1525-1530.