A 0.5μm CMOS 106transistors analog programmable array processor for real-time image processing

European Solid-State Circuits Conference

Volumn , Issue , 1999, Pages 358-361

  Linan G ^a   Foldesy, P ^a   Espejo, S ^a   Dominguez Castro R ^a   Rodriguez Vazquez A ^a  

^a INSTITUTO DE MICROELECTRÓNICA DE SEVILLA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

BINARY (BLACK AND WHITE) IMAGE; CMOS TECHNOLOGY; DIGITAL I/O; EDGE EXTRACTION; GREY SCALE IMAGES; GREYSCALE; MOVEMENT DETECTION; REAL-TIME IMAGE PROCESSING;

CMOS INTEGRATED CIRCUITS;

IMAGE PROCESSING;

EID: 0037857497     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. R. Domínguez-Castro et al.: "A 0.8mm CMOS Two-Dimensional Programmable Mixed-Signal Focal-Plane Array Processor with On-Chip Binary Imaging and Instructions Storage" IEEE Journal of Solid-State Circuits.Vol 32, No. 7, pp 1013-1026, July 1997.
2. P. Kinget and M. Steyaert. "Analog VLSI Integration of Massive Parallel Processing Systems", Ed.Kluwer Academic Publishers, 1996.
3. T. Roska and L.O. Chua: "The CNN Universal Machine: An Analogic Array Computer". IEEE Trans. Circuits and Systems II, Vol. 40, pp 163-173, March 1993.
4. P. Szolgay et al., "The Computational Infrastructure for Cellular Visual Microprocessors". Proceedings of the IEEE 7th Int. Conf. on Microlectronics for Neural, Fuzzy, and Bio-Inspired Systems, pp 54-60, Granada, Spain, April 1998.