-
4
-
-
0002841217
-
Investigation on different ESD protection strategies devoted to 3.3V RF applications (2 GHz) in a 0.18um CMOS process
-
C. Richier, P. Salome, G. Mabboux, I. Zaza, A. Juge and P. Mortini, "Investigation on different ESD protection strategies devoted to 3.3V RF applications (2 GHz) in a 0.18um CMOS process," EOS/ESD Symposium, 2000.
-
(2000)
EOS/ESD Symposium
-
-
Richier, C.1
Salome, P.2
Mabboux, G.3
Zaza, I.4
Juge, A.5
Mortini, P.6
-
5
-
-
0036051606
-
ESD protection design for RF integrated circuits: New challenges
-
A.Z. Wang, H.G. Feng, R.Y. Zhan, G. Chen and Q. Wu, "ESD protection design for RF integrated circuits: New challenges," IEEE Custom Integrated Circuits Conference, pp. 411-418, 2002.
-
(2002)
IEEE Custom Integrated Circuits Conference
, pp. 411-418
-
-
Wang, A.Z.1
Feng, H.G.2
Zhan, R.Y.3
Chen, G.4
Wu, Q.5
-
8
-
-
0005416779
-
A study of parasitic effects of ESD protection on RF ICs
-
Jan.
-
K. Gong, H.G. Feng, R.Y. Zhan, and A.Z.H. Wang, "A study of parasitic effects of ESD protection on RF ICs," IEEE Transactions on Microwave Theory and Techniques, pp. 393-402, Jan. 2002.
-
(2002)
IEEE Transactions on Microwave Theory and Techniques
, pp. 393-402
-
-
Gong, K.1
Feng, H.G.2
Zhan, R.Y.3
Wang, A.Z.H.4
-
9
-
-
0034854567
-
On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS processes
-
C.-Y. Chang and M.-D. Ker, "On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS processes," Intl. Symp. on VLSI Technology, Systems, and Applications, pp. 240-243, 2001.
-
(2001)
Intl. Symp. on VLSI Technology, Systems, and Applications
, pp. 240-243
-
-
Chang, C.-Y.1
Ker, M.-D.2
-
10
-
-
33646937180
-
CMOS RF integrated circuits at SGHz and beyond
-
Oct.
-
T.H. Lee and S.S. Wong, "CMOS RF integrated circuits at SGHz and beyond," Proceedings of the IEEE, vol. 88, pp. 1560-1571, Oct. 2000.
-
(2000)
Proceedings of the IEEE
, vol.88
, pp. 1560-1571
-
-
Lee, T.H.1
Wong, S.S.2
-
13
-
-
0036611859
-
A 0.8-dB NF ESD-protected 9-mW CMOS LNA operating at 1.23GHz
-
June
-
P. Leroux, J. Janssens and M. Steyaert, "A 0.8-dB NF ESD-protected 9-mW CMOS LNA operating at 1.23GHz," IEEE J. Solid-State Circuits, vol. 37, pp. 760-765, June 2002,
-
(2002)
IEEE J. Solid-State Circuits
, vol.37
, pp. 760-765
-
-
Leroux, P.1
Janssens, J.2
Steyaert, M.3
-
15
-
-
0028062385
-
Bonding pad models for silicon VLSI technologies and their effects on the noise figure of RF NPNs
-
N. Camilleri, J. Kirchgessner, J. Costa, D. Ngo and D. Lovelace, "Bonding pad models for silicon VLSI technologies and their effects on the noise figure of RF NPNs," IEEE MTT-S International Microwave Symposium, vol. 2, pp. 1179-1182, 1994.
-
(1994)
IEEE MTT-S International Microwave Symposium
, vol.2
, pp. 1179-1182
-
-
Camilleri, N.1
Kirchgessner, J.2
Costa, J.3
Ngo, D.4
Lovelace, D.5
-
17
-
-
0030195529
-
A 1 GHz CMOS RF front-end IC for a direct-conversion wireless receiver
-
July
-
A. Rofougaran, J.Y.-C. Chang, M. Rofougaran and A.A. Abidi, "A 1 GHz CMOS RF front-end IC for a direct-conversion wireless receiver," IEEE J. Solid-State Circuits, vol. 31, pp. 880-889, July 1996.
-
(1996)
IEEE J. Solid-State Circuits
, vol.31
, pp. 880-889
-
-
Rofougaran, A.1
Chang, J.Y.-C.2
Rofougaran, M.3
Abidi, A.A.4
-
18
-
-
0032639368
-
A metal-oxide-semiconductor varactor
-
F. Svelto, P. Erratico, S. Manzini and R. Castello, "A Metal-Oxide-Semiconductor varactor," IEEE Electron Device Letters, vol. 20, pp. 164-166, 1999.
-
(1999)
IEEE Electron Device Letters
, vol.20
, pp. 164-166
-
-
Svelto, F.1
Erratico, P.2
Manzini, S.3
Castello, R.4
-
19
-
-
0026259362
-
Simple equations to characterize bond wires
-
Nov.
-
S.L. March, "Simple equations to characterize bond wires," Microwaves & RF, pp. 105-110, Nov. 1991.
-
(1991)
Microwaves & RF
, pp. 105-110
-
-
March, S.L.1
-
20
-
-
0031631228
-
A +/-30% tuning range varactor compatable with future scaled technologies
-
R. Castello, P. Erratico, S. Manzini and F. Svelto, "A +/-30% tuning range varactor compatable with future scaled technologies," IEEE Symposium on VLSI Circuits, pp. 34-35, 1998.
-
(1998)
IEEE Symposium on VLSI Circuits
, pp. 34-35
-
-
Castello, R.1
Erratico, P.2
Manzini, S.3
Svelto, F.4
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