Analog decoding and beyond

Proceedings - 2001 IEEE Information Theory Workshop, ITW 2001

Volumn , Issue , 2001, Pages 126-127

  Loeliger, Hans Andrea ^a  

^a ETH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0037776528     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ITW.2001.955159     Document Type: Conference Paper

References (17)

1. A. Carusone, K. Farzan, and D. A. Johns, "Differential signaling with a reduced number of signal paths," IEEE Trans. Circuits Syst. II, vol. 48, pp. 294-300, March 2001.
2. R. C. Davis, Diode-Configured Viterbi Algorithm Error Correcting Decoder for Convolutional Codes. U. S. Patent 4545054, Oct. 1, 1985.
3. R. C. Davis and H.-A. Loeliger, "A nonalgorithmic maximum likelihood decoder for trellis codes," IEEE Trans. Inform. Theory, vol. 39, pp. 1450-1453, July 1993.
4. J. B. Dennis, Mathematical Programming and Electrical Networks. MIT Press/Wiley 1959.
5. G. D. Forney, Jr., "Codes on graphs: news and views," Proc. Int. Symp. on Turbo Codes and Related Topics, Sept. 4-7, 2000, Brest, France, pp. 9-16.
6. J. Hagenauer, "Decoding of binary codes with analog networks," Proc. 1998 Information Theory Workshop, San Diego, CA, Feb. 8-11, 1998, pp. 13-14.
7. J. Hagenauer and M. Winklhofer, "The analog decoder," Proc. 1998 IEEE Int. Symp. on Information Theory, Cambridge, MA USA, Aug. 16-21, 1998, p. 145.
8. J. Hagenauer, E. Offer, C. Méasson, and M. Mörz, "Decoding and equalization with analog non-linear networks," Europ. Trans. Telecomm., vol. 10, pp. 659-680, Nov.-Dec. 1999.
9. H.-A. Loeliger, F. Lustenberger, M. Helfenstein, and F. Tarköy, "Probability propagation and decoding in analog VLSI," Proc. 1998 IEEE Int. Symp. Inform. Th., Cambridge, MA, USA, Aug. 16-21, 1998, p. 146.
10. H.-A. Loeliger, F. Lustenberger, M. Helfenstein, and F. Tarköy, "Probability propagation and decoding in analog VLSI," IEEE Trans. Inform. Theory, vol. 47, pp. 837-843, Feb. 2001.
11. F. Lustenberger On the Design of Analog VLSI Iterative Decoders. Diss. ETH No 13879, Nov. 2000.
12. F. Lustenberger and H.-A. Loeliger, "On mismatch errors in analog-VLSI error correcting decoders," Proc. IEEE Int. Symp. on Circuits and Systems, Sydney, Australia, May 6-9, 2001, vol. 4, pp. 198-201.
13. C. Mead, Analog VLSI and Neural Systems. Addison-Wesley, 1989.
14. M. Moerz, T. Gabara, R. Yan, and J. Hagenauer, "An analog 0.25μ BiCMOS tailbiting MAP decoder", Proc. ISSCC 2000, San Francisco, CA, Feb. 2000, pp. 356-357.
15. M. H. Shakiba, D. A. Johns and K. W. Martin, "BiCMOS circuits for analog Viterbi decoders," IEEE Trans. Circuits Syst. II, vol. 45, Dec. 1998, pp. 1527-1537.
16. N. Wiberg, H.-A. Loeliger, and R. Kötter, "Codes and iterative decoding on general graphs," Europ. Trans. Telecommunications, vol. 6, pp. 513-525, Sept/Oct. 1995.
17. N. Wiberg, Codes and Decoding on General Graphs. Linköping Studies in Science and Technology, Ph.D. Thesis No. 440, Univ. Linköping, Sweden, 1996.