Extraction of the coupling coefficients for the top-floating-gate (TFG) flash EEPROM cell

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 2002, Pages 139-144

  McCarthy, Diarmuid ^a   O'Shea, Mike ^a   Duane, Russell ^a   McCarthy, Kevin ^b   Concannon, Ann ^c   Mathewson, Alan ^a  

^a UNIVERSITY COLLEGE CORK   (Ireland)

^b UNIVERSITY COLLEGE CORK   (Ireland)

^c NATIONAL SEMICONDUCTOR CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CHARGE MEASUREMENT; FLASH MEMORY; GATES (TRANSISTOR); VOLTAGE MEASUREMENT;

CONTROL GATE; COUPLING COEFFICIENTS; TOP FLOATING GATE;

ELECTRON DEVICE TESTING;

EID: 0037772188     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. M. Wada et al. "Limiting factors for programming EPROM of reduced dimensions", IEDM Tech Dig 1980 1980 pp. 38-40
2. M. Wong et al. "Analysis of the Subthreshold slope and the linear transconductance techniques for the extraction of the capacitance coupling-coefficients of Floating-Gate Devices", IEEE Electron Device Letters, vol 13, 1992 pp. 566-568
3. R. Duane et al. "Extraction of coupling ratios for Fowler-Nordheim programming conditions", Solid State Electronics, vol. 45, no. 2, Feb. 2001 pp. 235-242
4. G. Hong and C. Hsue, US Patent No. US5625213 United Microelectronics Corporation, Taiwan, 1997.
5. D. McCarthy et al. "A new CMOS compatible Top-Floating-Gate flash EEPROM Cell", submitted to Applied Physics Letters.