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Volumn , Issue , 1999, Pages 215-217

PVD Aluminum dual damascene interconnection: Yield comparison between counterbore and self aligned approaches

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM; ASPECT RATIO; CHEMICAL MECHANICAL POLISHING; DEFECT DENSITY; PHOTORESISTS;

EID: 0037691138     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.1999.787126     Document Type: Conference Paper
Times cited : (2)

References (8)
  • 2
    • 85039932060 scopus 로고    scopus 로고
    • Integration, reliability, and functionality of ULSI chips with sub 0.25μm CMOS and copper wiring
    • MRS-in press
    • D. Edelstein, "Integration, reliability, and functionality of ULSI chips with sub 0.25μm CMOS and copper wiring", Proc. of Advanced Metallization Conference (1998). MRS-in press
    • (1998) Proc. of Advanced Metallization Conference
    • Edelstein, D.1
  • 4
    • 85039945929 scopus 로고    scopus 로고
    • A novel low temperature CVD/PVD al filling process for producing highly reliable 0.175μm wiring/0.35μm pitch dual damascene interconnections in gigabit scale DRAMS
    • L.A. Clevenger et al., "A novel low temperature CVD/PVD Al filling process for producing highly reliable 0.175μm wiring/0.35μm pitch dual damascene interconnections in Gigabit scale DRAMS. Proceeding IITC San Francisco, p. 137 (1998).
    • (1998) Proceeding IITC San Francisco , pp. 137
    • Clevenger, L.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.