I/O placement for FPGAs with multiple I/O standards

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2003, Pages 51-57

  Mak, Wai Kei ^a  

^a University of South Florida   (United States)

Author keywords

Field programmable gate array; I O placement; I O standards; Placement

Indexed keywords

ALGORITHMS; COMPUTER AIDED ENGINEERING; CONSTRAINT THEORY; HEURISTIC METHODS; INTEGER PROGRAMMING; INTEGRATED CIRCUIT LAYOUT; LINEAR PROGRAMMING; LOGIC DESIGN; STANDARDS;

INPUT-OUTPUT STANDARDS; INTEGER LINEAR PROGRAM; PLACEMENT PROBLEM;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0037673257     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/611823.611826     Document Type: Conference Paper

References (9)

1. Altera Corp., "Using Selectable I/O Standards in APEX 20KE, APEX 20KC & MAX 7000B Devices", Application Note 117, Dec. 2001.
2. J. Anderson, J. Saunders, S. Nag, C. Madabhushi, and R. Jayaraman, "A Placement Algorithm for FPGA Designs with Multiple I/O Standards", in Proc. of the 10th Int'l Conference on Field-Programmable Logic and Applications, Lecture Notes in Computer Science 1896 (R.W. Hartenstein and H. Grünbacher, eds.), pp. 211-220, Springer-Verlag, Berlin, 2000.
3. M. Berkelaar, lp_solve, available by anonymous ftp from ftp://ftp.es.ele.tue.nl/pub/lp_solve.
4. G. B. Dantzig, Linear Programming and Extensions, Princeton University Press, N.J., 1963.
5. H.A. Tata, Operations Research: An Introduction (5th Edition), Macmillan Publishing Company, New York, 1992.
6. Xilinx Inc., "Virtex™ 2.5V Field Programmable Gate Arrays", Product Data Sheet, July 2002.
7. Xilinx Inc., "Virtex™-E 1.8V Field Programmable Gate Arrays", Product Data Sheet, July 2002.
8. Xilinx Inc., "Virtex-II 1.5V Field Programmable Gate Arrays", Advance Product Specification, July 2002.
9. Xilinx Inc., "Virtex-II Pro Field Programmable Gate Arrays", Advance Product Specification, June 2002.