메뉴 건너뛰기




Volumn 39, Issue 2, 2003, Pages 180-

Differentially pre-compensated GHz-range low-voltage track-and-hold

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC SWITCHES; INTEGRATED CIRCUIT LAYOUT; JITTER; SPURIOUS SIGNAL NOISE;

EID: 0037461924     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20030151     Document Type: Article
Times cited : (8)

References (3)
  • 1
    • 0027867460 scopus 로고
    • A 10-b, 75-MHz two-stage pipelined bipolar A/D converter
    • Colleran, W., and Abidi, A.: 'A 10-b, 75-MHz two-stage pipelined bipolar A/D converter', IEEE J. Solid-State Circuits, 1993, 28, (12), pp. 1187-1199
    • (1993) IEEE J. Solid-State Circuits , vol.28 , Issue.12 , pp. 1187-1199
    • Colleran, W.1    Abidi, A.2
  • 2
    • 0031351789 scopus 로고    scopus 로고
    • A 1-Gsample/s 10-b full Nyquist silicon bipolar track&hold IC
    • Baumheinrich, T., Prégardier, B., and Langmann, U.: 'A 1-Gsample/s 10-b full Nyquist silicon bipolar track&hold IC',IEEE J. Solid-State Circuits, 1997, 32, (12), pp. 1951-1960
    • (1997) IEEE J. Solid-State Circuits , vol.32 , Issue.12 , pp. 1951-1960
    • Baumheinrich, T.1    Prégardier, B.2    Langmann, U.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.