Flash ADC architecture

Electronics Letters

Volumn 39, Issue 6, 2003, Pages 501-502

  Stojcevski, A ^a   Le, H P ^a   Singh, J ^a   Zayegh, A ^a  

^a VICTORIA UNIVERSITY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPARATOR CIRCUITS; FREQUENCIES; MOSFET DEVICES; NOISE GENERATORS; SIGNAL ENCODING; SPURIOUS SIGNAL NOISE;

WIRELESS APPLICATIONS;

ANALOG TO DIGITAL CONVERSION;

EID: 0037456963     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20030290     Document Type: Article

References (7)

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2. STOJCEVSKI, A., SINGH, J., and ZAYEGH, A.: 'Design implication of the building block components of pipeline analog-to-digital converters', J. Adv. Model. Simul. (AMSE, France), 2002
3. STOJCEVSKI, A., SINGH, J., and ZAYEGH, A.: 'Performance analysis of a CMOS analog to digital converter for wireless telecommunications'. Proc. IEEE Devices & Systems Conf. ISIC-2001, Singapore, 2001 pp. 59-62
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6. STOJCEVSKI, A., SINGH, J., and ZAYEGH, A.: 'Modified flash ADC architecture with reduced power and complexity'. Proc. 4th Int. Conf. on Modeling and Simulation, MS'02, Melbourne, Australia, 2002, pp. 169-173
7. GRAY, P.R., HURST, P.J., LEWIS, S.H., and MEYER, R.G.: 'Analysis and design of analog integrated circuit' (John Wiley & Son Inc., 2001, 4th edn.)