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Volumn 45, Issue 1, 2003, Pages 22-30

Power-bus decoupling with embedded capacitance in printed circuit board design

Author keywords

Conduction loss; Decoupling capacitor; Embedded capacitance (buried capacitance); Power plane; Power bus decoupling; Power bus impedance; Power bus noise (delta I noise, ground bounce noise, simultaneous switch noise); Return plane

Indexed keywords

CAPACITANCE; DAMPING; DIELECTRIC MATERIALS; ELECTRIC IMPEDANCE; INDUCTANCE; MULTICARRIER MODULATION; SIGNAL INTERFERENCE;

EID: 0037297131     PISSN: 00189375     EISSN: None     Source Type: Journal    
DOI: 10.1109/TEMC.2002.808075     Document Type: Article
Times cited : (107)

References (6)
  • 2
    • 0002639396 scopus 로고
    • Eliminating capacitors from multi-layer PCB's
    • J. Sisler, "Eliminating capacitors from multi-layer PCB's," Printed Circuit Des., vol. 8, no. 7, pp. 14-23, 1991.
    • (1991) Printed Circuit Des. , vol.8 , Issue.7 , pp. 14-23
    • Sisler, J.1
  • 4
    • 2042467942 scopus 로고    scopus 로고
    • National Center for Manufacturing Sciences, Ann Arbor, MI, Final Rep. 0091RE00
    • "Embedded decoupling capacitance (edc) project-Final Report," National Center for Manufacturing Sciences, Ann Arbor, MI, Final Rep. 0091RE00, 2000.
    • (2000) Embedded Decoupling Capacitance (edc) Project - Final Report


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.