Modelling single-electron-transistor-based readout in the Kane solid-state quantum computer

Nanotechnology

Volumn 14, Issue 2, 2003, Pages 161-164

  Pakes, C I ^a   Conrad, V ^a   Ang, J C ^a   Green, F ^b   Dzurak, A S ^b   Hollenberg, L C L ^a   Jamieson, D N ^a   Clark, R G ^b  

^a UNIVERSITY OF MELBOURNE   (Australia)

^b UNIVERSITY OF NEW SOUTH WALES   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ELECTROMETERS; MOSFET DEVICES; NANOSTRUCTURED MATERIALS; READOUT SYSTEMS; RELAXATION PROCESSES; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MODELS;

QUBIT ELECTRONIC CHARGE STATE; SINGLE ELECTRON TRANSISTOR; SOLID-STATE QUANTUM COMPUTER; SPIN-POLARIZED MOTION;

QUANTUM ELECTRONICS;

EID: 0037292781     PISSN: 09574484     EISSN: None     Source Type: Journal    
DOI: 10.1088/0957-4484/14/2/312     Document Type: Article

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