-
1
-
-
0026116572
-
RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock-frequency digital systems
-
March
-
K. K. Likharev, V. K. Semenov, "RSFQ Logic/Memory Family: A New Josephson-Junction Technology for Sub-Terahertz-Clock-Frequency Digital Systems," IEEE Transactions on Applied Superconductivity, Vol. 1, no. 1, pp. 3-28, March 1991.
-
(1991)
IEEE Transactions on Applied Superconductivity
, vol.1
, Issue.1
, pp. 3-28
-
-
Likharev, K.K.1
Semenov, V.K.2
-
2
-
-
0013179240
-
-
Stony Brook University Homepage: http://pavel.physics.sunysb.edu/RSFQ/RSFQ.html.
-
-
-
-
3
-
-
0030232326
-
Complementary output switching logic - A new superconducting voltage-state logic family
-
3 September
-
W. J. Perold, M. Jeffery, Z. Wang, T. Van Duzer, "Complementary Output Switching Logic - A New Superconducting Voltage-State Logic Family," IEEE Transactions on Applied Superconductivity, Vol. 6, no. 3, pp. 125-131, 3 September 1996.
-
(1996)
IEEE Transactions on Applied Superconductivity
, vol.6
, Issue.3
, pp. 125-131
-
-
Perold, W.J.1
Jeffery, M.2
Wang, Z.3
Van Duzer, T.4
-
4
-
-
0030264338
-
Superconducting complementary output switching logic operating at 5-10 Gb/s
-
28 October
-
M. Jeffery, W. Perold, T. Van Duzer, "Superconducting complementary output switching logic operating at 5-10 Gb/s," Applied Physics Letters, Vol. 69, no. 18, pp. 2746-2748, 28 October 1996.
-
(1996)
Applied Physics Letters
, vol.69
, Issue.18
, pp. 2746-2748
-
-
Jeffery, M.1
Perold, W.2
Van Duzer, T.3
-
5
-
-
0032167314
-
Monte Carlo optimization of complementary output switching logic circuits
-
September
-
M. Jeffery, W. J. Perold, Z. Wang, T. Van Duzer, "Monte Carlo Optimization of Complementary Output Switching Logic Circuits," IEEE Transactions on Applied Superconductivity, Vol. 8, no. 3, pp. 104-119, September 1998.
-
(1998)
IEEE Transactions on Applied Superconductivity
, vol.8
, Issue.3
, pp. 104-119
-
-
Jeffery, M.1
Perold, W.J.2
Wang, Z.3
Van Duzer, T.4
-
6
-
-
0013180954
-
Superconducting COSL building blocks for ultra-high speed logic circuits
-
MscEng Thesis, University of Stellenbosch
-
F. J. Rabie, Superconducting COSL building blocks for ultra-high speed logic circuits, MscEng Thesis, University of Stellenbosch, 1999.
-
(1999)
-
-
Rabie, F.J.1
-
7
-
-
0003495088
-
A 10 GHz oversampling delta modulating analogue-to-digital converter implemented with hybrid superconducting digital logic
-
MScEng thesis, University of Stellenbosch, March
-
C. J. Fourie, A 10 GHz Oversampling Delta Modulating Analogue-to-Digital Converter Implemented with Hybrid Superconducting Digital Logic, MScEng thesis, University of Stellenbosch, March 2001.
-
(2001)
-
-
Fourie, C.J.1
-
8
-
-
0003882343
-
Genetic programming: On the programming of computers by means of natural selection
-
MIT Press
-
J. R. Koza, Genetic Programming: On the Programming of Computers by Means of Natural Selection, MIT Press, 1993.
-
(1993)
-
-
Koza, J.R.1
-
9
-
-
0031122888
-
Evolutionary computation: Comments on the history and current state
-
April
-
T. Back, U. Hammel, H.-P. Schwefel, "Evolutionary Computation: Comments on the History and current State," IEEE Trans. on evolutionary Computation, Vol. 1, No. 1, pp. 3-17, April 1997.
-
(1997)
IEEE Trans. on Evolutionary Computation
, vol.1
, Issue.1
, pp. 3-17
-
-
Back, T.1
Hammel, U.2
Schwefel, H.-P.3
-
11
-
-
0004199736
-
-
Hypres, 175 Clearbrook Road, Elmsford, New York 10523
-
Hypres, 175 Clearbrook Road, Elmsford, New York 10523, Niobium Design Rules, 1997. Homepage: http://www.hypres.com.
-
(1997)
Niobium Design Rules
-
-
-
12
-
-
84876603843
-
-
Whiteley Research Inc., 456 Flora Vista Avenue, Sunnyvale, CA 94086
-
Whiteley Research Inc., 456 Flora Vista Avenue, Sunnyvale, CA 94086, WRSpice Circuit Simulation System, Homepage: http://www.srware.com.
-
WRSpice Circuit Simulation System
-
-
|