Design methodology for broadband delta-sigma analog-to-digital converters

Midwest Symposium on Circuits and Systems

Volumn 2, Issue , 2002, Pages

  Safi Harb, Mona ^a   Roberts, Gordon W ^a  

^a MCGILL UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; BROADBAND NETWORKS; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; OPTIMIZATION;

DELTA-SIGMA MODULATORS;

ANALOG TO DIGITAL CONVERSION;

EID: 0036977149     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Y. Geerts, M. Steyaert, and W. Sansen, "A High Performance Multibit ΔΣ CMOS ADC", IEEE JSSC, Vol. 35, No. 12, pp. 1829-1840, 2000.
2. S. Brigati, F. Francesconi, P. Malcovati, D. Tonietto, A. Baschirotto, and F. Maloberti, "Modeling Sigma-Delta Modulator Non-Idealities in Simulink", Proc. ISCAS, Vol. 2, pp. 384-387, 1999.
3. K. Francken, P. Vancorenland, and G. Gielen, "Dedicated System-Level Simulation of ΔΣ Modulators", International Conference on Computer Aided Design, pp. 188-192, 2000.
4. N. Chandra, and G. W. Roberts, "Top-Down Analog Design Methodology using Matlab and Simulink", Proc. IEEE ISCAS, Vol. 5, pp. 319-322, 2001.
5. A. Marques, V. Peluso, M.. Steyaert, and W. Sansen, "Optimal Parameters for AI Modulator Topologies", IEEE Trans. on Circuits and Systems II, Vol. 45, No. 9, pp. 1232-1241, 1998.
6. N. Chandra, "A Top-Down Approach to Delta-Sigma Modulator Design", M. Eng. Thesis, McGill University, 2001.