Generic control flow reconstruction from assembly code

Joint COnference on Languages, Compilers and Tools for Embedded Systems and Software and Compilers for Embedded Systems

Volumn , Issue , 2002, Pages 46-55

  Kästner, Daniel ^a   Wilhelm, Stephan ^a  

^a SAARLAND UNIVERSITY   (Germany)

Author keywords

Assembly code; Call graph; Control flow reconstruction; Embedded processors; Postpass optimization; Retargetable compilers

Indexed keywords

COMPUTER HARDWARE; EMBEDDED SYSTEMS; MICROPROCESSOR CHIPS; PROGRAM PROCESSORS;

CONTROL FLOW RECONSTRUCTION;

CODES (SYMBOLS);

EID: 0036974913     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/513837.513839     Document Type: Conference Paper

References (25)

1. H. Agrawal. On Slicing Programs with Jump Statements. In Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, pages 302-312, 1994.
2. Analog Devices. ADSP-2106x SHARC User's Manual, 1995.
3. C. Cifuentes. Interprocedural Data Flow Decompilation. Journal of Programming Languages, 4(2):77-99, June 1996.
4. C. Cifuentes and A. Fraboulet. Intraprocedural Static Slicing of Binary Executables. Proceedings of the International Conference on Software Maintenance, pages 188-195, October 1997.
5. C. Cifuentes, D. Simon, and A. Fraboulet. Assembly to High-Level Language Translation. Proceedings of the International Conference on Software Maintenance, pages 228-237, August 1998.
6. J.W. Davidson and C.W. Fraser. The Design and Application of a Retargetable Peephole Optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191-202, April 1980.
7. J.W. Davidson and C.W. Fraser. Code Selection through Object Code Optimization. ACM Transactions on Programming Languages and Systems, 6 (4): 505-526, October 1984.
8. A. Halambi, P. Grun, V. Ganesh, A. Khare, N. Dutt, and A. Nicolau. EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability. Proceedings of the DATE99, 1999.
9. S. Hanono and S. Devadas. Instruction Scheduling, Resource Allocation, and Scheduling in the AVIV Retargetable Code Generator. In Proceedings of the Design Automation Conference 1998, San Francisco, California, 1998. ACM.
10. D. Kästner. PROPAN: A Retargetable System for Postpass Optimisations and Analyses. Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems, June 2000.
11. D. Kästner. Retargetable Code Optimisation by Integer Linear Programming. PhD thesis, Saarland University, 2000.
12. D. Kästner. TDL: A Hardware and Assembly Description Language. Technical Report TDL1.4, Transferbereich 14, Saarland University, 2000.
13. D. Kästner. ILP-based Approximations for Retargetable Code Optimization. Proceedings of the 5th International Conference on Optimization: Techniques and Applications (ICOTA 2001), 2001.
14. D. Kästner and M. Langenbach. Code Optimization by Integer Linear Programming. In Proceedings of the 8th International Conference on Compiler Construction CC99, pages 122-136, March 1999.
15. D. Lanneer, J. Van Praet, A. Kifli, K. Schoofs, W. Geurts, F. Thoen, and G. Goossens. CHESS: Retargetable Code Generation For Embedded DSP Processors. In [19], pages 85-102. Kluwer, 1995.
16. J.R. Larus and E. Schnarr. EEL: Machine-Independent Executable Editing. In Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, pages 291-300, 1995.
17. R. Leupers. Retargetable Code Generation for Digital Signal Processors, Kluwer Academic Publishers, 1997.
18. J. Lyle. Evaluating Variations of Program Slicing for Debugging, PhD thesis, University of Maryland, College Park, Maryland, December 1984.
19. P. Marwedel and G. Goossens. Code Generation for Embedded Processors. Kluwer, 1995.
20. Philips Electronics North America Corporation. TriMedia TM1000 Preliminary Data Book, 1997.
21. SPARC International Inc. The SPARC-Architecture Manual, 2nd edition, 1992.
22. B.D. Sutter, B.D. Bus, K.D. Bosschere, P. Keyngnaert, and B. Demoen. On the Static Analysis of Indirect Control Flow in Binaries. In Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA), 2000.
23. Henrik Theiling. Extracting Safe and Precise Control Flow from Binaries. In Proceedings of the 7h International Conference on Real-Time Computing Systems and Applications, July 2000.
24. M. Weiser. Program Slicing. In Proceedings of the 5th International Conference on Software Engineering, pages 439-449. IEEE Computer Society Press, March 1981.
25. V. Zivojnovic, J.M. Velarde, C. Schläger, and H. Meyr. DSPSTONE: A DSP-Oriented Benchmarking Methodology. In Proceedings of the International Conference on Signal Processing Applications and Technology, 1994.