메뉴 건너뛰기




Volumn 1, Issue , 2002, Pages

Zeroing in on a zero-temperature coefficient point

Author keywords

Device characterization; MOSFET; Offset voltage drift; Propagation delay temperature stability; Temperature effects

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL CIRCUITS; ELECTRIC POTENTIAL; STATIC RANDOM ACCESS STORAGE; TRANSCONDUCTANCE;

EID: 0036974173     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (11)

References (11)
  • 2
    • 0029639443 scopus 로고
    • Temperature-independent output voltage generated by the threshold voltage of NMOS Transistor
    • T. Manku, Y. Wang, Temperature-independent output voltage generated by the threshold voltage of NMOS Transistor", Electron. Lett, vol. 31 pp. 935-936, 1995.
    • (1995) Electron. Lett , vol.31 , pp. 935-936
    • Manku, T.1    Wang, Y.2
  • 3
    • 0035394088 scopus 로고    scopus 로고
    • Mutual compensation of mobility and threshold voltage temperature effects with application in CMOS circuits
    • I. M Filanovsky, A. Allam, "Mutual compensation of mobility and threshold voltage temperature effects with application in CMOS circuits", IEEE Trans. Circ. Syst., pt. I: Fundam. Theory. Applic., vol. 48, No 7, pp. 876-884, 2001.
    • (2001) IEEE Trans. Circ. Syst., Pt. I: Fundam. Theory. Applic. , vol.48 , Issue.7 , pp. 876-884
    • Filanovsky, I.M.1    Allam, A.2
  • 4
    • 0035370456 scopus 로고    scopus 로고
    • Temperature dependence of output voltage generated by interaction of threshold voltage and mobility of NMOS transistor
    • I. M. Filanovsky, A. Allam, Su Tarn Lim, "Temperature dependence of output voltage generated by interaction of threshold voltage and mobility of NMOS transistor", Analog Integrated Circuits and Signal Processing, vol. 27, No 3, pp. 229-238, 2001.
    • (2001) Analog Integrated Circuits and Signal Processing , vol.27 , Issue.3 , pp. 229-238
    • Filanovsky, I.M.1    Allam, A.2    Lim, S.T.3
  • 5
    • 0035473305 scopus 로고    scopus 로고
    • Design impact of positive temperature dependence on drain current in sub-1-V CMOS VLSIs
    • K. Kanda, K. Nose, H. Kawaguchi, T. Sakurai, "Design impact of positive temperature dependence on drain current in sub-1-V CMOS VLSIs", IEEE J. Solid_State Circuits, vol. 36, No 10, pp. 1559-1564, 2001.
    • (2001) IEEE J. Solid_State Circuits , vol.36 , Issue.10 , pp. 1559-1564
    • Kanda, K.1    Nose, K.2    Kawaguchi, H.3    Sakurai, T.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.