Asymmetric-frequency clustering: A power-aware back-end for high-performance processors

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 2002, Pages 255-258

  Baniasadi, Amirali ^a   Moshovos, Andreas ^b  

^a Northwestern University   (United States)

^b UNIVERSITY OF TORONTO   (Canada)

Author keywords

Assymetric frequency clustering; High performance processors; Instruction criticality; Power aware architectures; Processor back end

Indexed keywords

ELECTRIC POWER SUPPLIES TO APPARATUS; FREQUENCY DOMAIN ANALYSIS; PIPELINE PROCESSING SYSTEMS; PROGRAM PROCESSORS; RESPONSE TIME (COMPUTER SYSTEMS); STATIC RANDOM ACCESS STORAGE;

ASYMMETRIC FREQUENCY CLUSTERING; INSTRUCTION CRITICALITY; MICROARCHITECTURAL TECHNIQUE;

COMPUTER ARCHITECTURE;

EID: 0036948968     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/lpe.2002.146749     Document Type: Conference Paper

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