A CMOS feedforward neural-network chip with on-chip parallel learning for oscillation cancellation

IEEE Transactions on Neural Networks

Volumn 13, Issue 5, 2002, Pages 1178-1186

  Liu, Jin ^a,b   Brooke, Martin A ^a,c   Hirotsu, Kenichi ^a,d  

^a IEEE   (United States)

^b The University of Texas at Dallas   (United States)

^c GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^d SUMITOMO ELECTRIC INDUSTRIES LTD   (Japan)

Author keywords

Analog finite impulse response (FIR) filter; Direct feedback control; Neural network chip; Oscillation cancellation; Parallel on chip learning

Indexed keywords

ON-CHIP PARALLEL LEARNING; OSCILLATION CANCELLATION;

CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE; COMPUTER SIMULATION; ERROR CORRECTION; FEEDBACK CONTROL; FEEDFORWARD NEURAL NETWORKS; FIR FILTERS; LEARNING SYSTEMS; OSCILLATIONS; PARALLEL PROCESSING SYSTEMS;

MICROPROCESSOR CHIPS;

EID: 0036737353     PISSN: 10459227     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNN.2002.1031948     Document Type: Article

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