Mixed analog/digital matrix-vector multiplier for neural network synapses

Analog Integrated Circuits and Signal Processing

Volumn 9, Issue 1, 1996, Pages 55-63

  Lehmann, Torsten ^a   Bruun, Erik ^b   Dietrich, Casper ^c  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

^b TECHNICAL UNIVERSITY OF DENMARK   (Denmark)

^c Giga A/S   (Denmark)

Author keywords

[No Author keywords available]

Indexed keywords

BACKPROPAGATION; CMOS INTEGRATED CIRCUITS; LEARNING SYSTEMS; LINEAR NETWORK SYNTHESIS; MATHEMATICAL MODELS; MATRIX ALGEBRA; NEURAL NETWORKS; VECTORS;

CURRENT RECTIFIER SIGN DETECTOR; DIGITAL WEIGHT STORAGE; MATRIX VECTOR MULTIPLIER; SYNAPSE STRENGTHS;

VLSI CIRCUITS;

EID: 0029771470     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1007/BF00158852     Document Type: Article

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