Low-power implementation of an encryption/decryption system with asynchronous techniques

VLSI Design

Volumn 15, Issue 1, 2002, Pages 455-468

  Sklavos, Nikos ^a   Papakonstantinou, Alexandros ^a   Theoharis, Spyros ^a   Koufopavlou, Odysseas ^a  

^a UNIVERSITY OF PATRAS   (Greece)

Author keywords

Asynchronous VLSI implementation; Cryptography; Encryption decryption algorithm; IDEA algorithm

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; CRYPTOGRAPHY; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; WIRELESS TELECOMMUNICATION SYSTEMS;

ASYNCHRONOUS TECHNIQUE; DECRYPTION SYSTEM; INTERNATIONAL DATA ENCRYPTION ALGORITHM; WIRELESS ENCRYPTION PROTOCOL;

VLSI CIRCUITS;

EID: 0036704761     PISSN: 1065514X     EISSN: None     Source Type: Journal    
DOI: 10.1080/1065514021000012066     Document Type: Article

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