Electrical characteristics of ZrO2 gate dielectric deposited on ultrathin silicon capping layer for SiGe metal-oxide-semiconductor device applications

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 41, Issue 8, 2002, Pages 5129-5130

  Choi, Sangmoo ^a   Jeon, Sanghun ^a   Hwang, Hyunsang ^a,b   Song, Young J ^a   Lim, Jung Wook ^a   Shim, Kyu Hwan ^a   Park, Kyung Wan ^a  

^a Gwangju Institute of Science and Technology (GIST)   (South Korea)

^b Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

Author keywords

Ge segregation; SiGe; Silicon capping layer; Wet vapor annealing; ZrO2

Indexed keywords

ANNEALING; AUGER ELECTRON SPECTROSCOPY; DIELECTRIC DEVICES; FIELD EFFECT TRANSISTORS; GATES (TRANSISTOR); HYSTERESIS; INTERFACES (MATERIALS); LEAKAGE CURRENTS; ZIRCONIA;

WET VAPOR ANNEALING;

MOS DEVICES;

EID: 0036697965     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.41.5129     Document Type: Article

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