Nanoscale multi-line patterning using sidewall structure

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 41, Issue 6 B, 2002, Pages 4410-4414

  Chung, Kyung Hoon ^a   Sung, Suk Kang ^a   Kim, Dae Hwan ^a   Choi, Woo Young ^a   Lee, Cheon An ^a   Lee, Jong Duk ^a   Park, Byung Gook ^a  

^a Seoul National University   (South Korea)

Author keywords

Buffer layer; Dummy pattern; Etch selectivity; Hard mask; Sidewall patterning technique; Uniformity

Indexed keywords

DRY ETCHING; ELECTRON DEVICES; PHASE SHIFT; PHOTORESISTS; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; SCANNING ELECTRON MICROSCOPY; SUBSTRATES;

MULTI-LINE PATTERNING;

NANOTECHNOLOGY;

EID: 0036614047     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.41.4410     Document Type: Article

References (7)