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Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 31, Issue 2, 2002, Pages 173-184

A multiplication-free algorithm and a parallel architecture for affine transformation

(2) Badawy, Wael a Bayoumi, Magdy b

a UNIVERSITY OF CALGARY (Canada)

b Informatics Research Institute (United States)

Author keywords

Affine transformation; Low power; MPEG 4; Texture mapping; Video object; VLSI

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; CODES (STANDARDS); ELECTRIC POWER UTILIZATION; MULTIPLYING CIRCUITS; PARALLEL PROCESSING SYSTEMS;

AFFINE TRANSFORMATIONS (AT);

IMAGE PROCESSING;

EID: 0036603490 PISSN: 13875485 EISSN: None Source Type: Journal
DOI: 10.1023/A:1015397423173 Document Type: Article

Times cited : (17)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.