Effects of substrate design on underfill voiding using the low cost, high throughput flip chip assembly process and no-flow underfill materials

IEEE Transactions on Electronics Packaging Manufacturing

Volumn 25, Issue 2, 2002, Pages 107-112

  Milner, David ^b   Paydenkar, Chetan ^b   Baldwin, Daniel F ^a,b  

^a IEEE   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Electronic packaging; Flip chip; No flow underfill; Underfill processing

Indexed keywords

SOLDER-MASK OPENINGS; UNDERFILL MATERIALS;

COST EFFECTIVENESS; ELECTRONICS PACKAGING; SOLDERING; SUBSTRATES; THROUGHPUT; VISCOSITY;

FLIP CHIP DEVICES;

EID: 0036545205     PISSN: 1521334X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TEPM.2002.1021635     Document Type: Article

References (10)

1. Advanced encapsulation processing for low cost flip chip assembly - A cost analysis
2. High-throughput, low-cost flip chip-on-board assembly
3. Squeezing flow between parallel disks. I theoretical analysis